The present invention relates to the field of integrated circuits and in particular to programmable devices having convertible storage elements. In programmable devices, such as programmable logic devices (PLD), one type of random access memory is used to store configuration data of the PLD, this type of memory is often referred to as a configuration random access memory (CRAM). Each CRAM stores a pre-defined bit or information for a static task. Depending on the combination of multiple CRAMs, a PLD is able to work differently by using the same hardware. One skilled in the art will appreciate that the CRAM is loaded during the start-up operation of the PLD. The start-up operation where the CRAM is loaded, which may be referred to as a configuration mode, typically occurs between the chip power on and the user operation. Once the CRAM is loaded, the contents cannot be changed.
Despite the success of programmable logic, there is a continuing desire to provide greater functionality in a programmable logic device, and at the same time, to provide greater flexibility. There is also a need to provide higher performance user memories also. Currently, the memories for a programmable logic device are typically pre-defined in size and these pre-defined memories are used under restrictions. Thus, the restrictions limit the flexibility of using the memories, e.g., when a portion of the programmable logic device that contains the memory, or combinational logic that includes memory is unused, the memory remains unused.
Accordingly, there is a need for a highly flexible memory, which may be selectively configured between combinational logic functions and memory functions within a programmable logic device.